STATIC CHARACTERISTICS OF GATE-ALL-AROUND SOI MOSFETS AT CRYOGENIC TEMPERATURES

被引:3
|
作者
SIMOEN, E
CLAEYS, C
机构
[1] IMEC, Leuven
关键词
D O I
10.1002/pssa.2211480233
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The operation of so-called gate-all-around (GAA) dual-gate silicon-on-insulator (SOI) MOSFETs at cryogenic temperatures (77 K and 4.2 K) is discussed. It is shown that the transconductance increases by a factor of two upon cooling to 77 K, both for the subthreshold edge conduction and for the inversion channel. Therefore, the performance improvement of the GAA structures over conventional SOI, or bulk MOSFETs is maintained down to liquid helium temperatures. Furthermore, the n-channel devices show negligible hysteresis and kink even at 4.2 K. Metastable behaviour is only observed after the application of a proper bias step to the back-gate electrode.
引用
收藏
页码:635 / 642
页数:8
相关论文
共 50 条
  • [21] Characterization and Reliability of III-V Gate-all-around MOSFETs
    Si, Mengwei
    Shin, SangHoon
    Conrad, Nathan J.
    Gu, Jiangjiang
    Zhang, Jingyun
    Alam, Muhammad A.
    Ye, Peide D.
    2015 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2015,
  • [22] Design and optimization considerations for bulk gate-all-around nanowire MOSFETs
    Song, Yi
    Xu, Qiuxia
    Zhou, Huajie
    Cai, Xiaowu
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2009, 24 (10)
  • [23] Performance and Variability Studies of InGaAs Gate-all-Around Nanowire MOSFETs
    Conrad, Nathan
    Shin, SangHong
    Gu, Jiangjiang
    Si, Mengwei
    Wu, Heng
    Masuduzzaman, Muhammad
    Alam, Mohammad A.
    Ye, Peide D.
    IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2013, 13 (04) : 489 - 496
  • [24] Compact Modeling of Quantization Effects for Cylindrical Gate-All-Around MOSFETs
    Cousin, Bastien
    Rozeau, Olivier
    Jaud, Marie-Anne
    Jomaah, Jalal
    ULIS 2009: 10TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION OF SILICON, 2009, : 269 - +
  • [25] Performance of γ-irradiated gate-all-around SOI MOS OTA amplifiers
    Vandooren, A
    Francis, P
    Flandre, D
    Colinge, JP
    1997 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS, 1996, : 62 - 63
  • [26] Drain current modelling of double gate-all-around (DGAA) MOSFETs
    Kumar, Arun
    Bhushan, Shiv
    Tiwari, Pramod Kumar
    IET CIRCUITS DEVICES & SYSTEMS, 2019, 13 (04) : 519 - 525
  • [27] Compact modeling of quantum confinements in nanoscale gate-all-around MOSFETs
    Peng, Baokang
    Jiao, Yanxin
    Zhong, Haotian
    Rong, Zhao
    Wang, Zirui
    Xiao, Ying
    Wong, Waisum
    Zhang, Lining
    Wang, Runsheng
    Huang, Ru
    FUNDAMENTAL RESEARCH, 2024, 4 (05): : 1306 - 1313
  • [28] Realization of gate-all-around (GAA) SOI MOSFET using replacement gate mask
    Theng, A. L.
    Goh, W. L.
    Chan, Y. T.
    Tee, K. M.
    Chan, L.
    Ng, C. M.
    EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS, 2007, : 1129 - +
  • [29] Sensitivity of Gate-All-Around Nanowire MOSFETs to Process Variations-A Comparison With Multigate MOSFETs
    Wu, Yu-Sheng
    Su, Pin
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (11) : 3042 - 3047
  • [30] Discussion on the 1/f noise behavior in Si gate-all-around nanowire MOSFETs at liquid helium temperatures
    Boudier, D.
    Cretu, B.
    Simoen, E.
    Veloso, A.
    Collaert, N.
    2018 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS), 2018, : 81 - 84