共 50 条
- [1] Performance enhancement of gate-all-around InGaAs nanowire MOSFETs by raised source and drain structure [J]. 2013 71ST ANNUAL DEVICE RESEARCH CONFERENCE (DRC), 2013, : 19 - +
- [2] From gate-all-around to nanowire MOSFETs [J]. CAS 2007 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2007, : 11 - 17
- [3] Impact of Nanowire Variability on Performance and Reliability of Gate-all-around III-V MOSFETs [J]. 2013 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2013,
- [4] Characterization of Interface Trap Density of In-rich InGaAs Gate-all-around Nanowire MOSFETs [J]. 2012 7TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (ICECE), 2012,
- [5] Structure effects in the gate-all-around silicon nanowire MOSFETs [J]. EDSSC: 2007 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, VOLS 1 AND 2, PROCEEDINGS, 2007, : 129 - 132
- [6] FinFET Versus Gate-All-Around Nanowire FET: Performance, Scaling, and Variability [J]. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2018, 6 (01): : 332 - 340
- [9] InAs Nanowire Gate-All-Around MOSFETs by Heterogeneous Planar VLS Growth [J]. 2015 73RD ANNUAL DEVICE RESEARCH CONFERENCE (DRC), 2015, : 181 - 182
- [10] InAs Gate-all-around Nanowire MOSFETs by Top-down Approach [J]. 2014 72ND ANNUAL DEVICE RESEARCH CONFERENCE (DRC), 2014, : 213 - +