Fast Low Voltage Analog Four-Quadrant Multipliers Based on CMOS Inverters

被引:4
|
作者
Machowski, Witold [1 ]
Kuta, Stanislaw [1 ]
Jasielski, Jacek [1 ]
Kolodziejski, Wojciech [2 ]
机构
[1] AGH Univ Sci & Technol, Dept Elect, Mickiewicza 30, PL-30059 Krakow, Poland
[2] State Higher Vocat Sch Tarnow, Dept Elect & Telecommun, PL-33100 Tarnow, Poland
关键词
Analog VLSI; four quadrant multiplier; CMOS circuits; low voltage circuits;
D O I
10.2478/v10177-010-0050-z
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
The paper presents quarter-square analog fourquadrant multipliers, based on proprietary architecture using four CMOS inverters. The most important upgrade on already published own circuit implementation is the use of the same inverter "core" of the circuit with completely redesigned auxiliary and steering blocks. Two variants of new driving peripherals are considered: one with differential pair, the second with CMOS inverters. The proposed circuit solutions are suitable for RF applications in communication systems due to simple architecture comprising building blocks with RF CMOS transistors having sufficiently large biasing currents. Postlayout simulation results done on the basis of 180nm CMOS UMC Foundry Design Kit are also presented.
引用
收藏
页码:381 / 386
页数:6
相关论文
共 50 条
  • [21] Low voltage four-quadrant analog multiplier using square-root circuit based on CMOS pair
    Hyogo, Akira
    Fukutomi, Yoshio
    Sekine, Keitaro
    [J]. Proceedings - IEEE International Symposium on Circuits and Systems, 1999, 2
  • [22] New Four-Quadrant CMOS Current-Mode and Voltage-Mode Multipliers
    Mohammed A. Hashiesh
    Soliman A. Mahmoud
    Ahmed M. Soliman
    [J]. Analog Integrated Circuits and Signal Processing, 2005, 45 : 295 - 307
  • [23] New four-quadrant CMOS current-mode and voltage-mode multipliers
    Hashiesh, M
    Mahmoud, S
    Soliman, A
    [J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2005, 45 (03) : 295 - 307
  • [24] CMOS Fully Differential CMOS Four-Quadrant Analog Multiplier
    Mahmoud, Soliman A.
    [J]. 2008 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, 2008, : 27 - 30
  • [25] A low-voltage, low-power, high-linearity CMOS four-quadrant analog multiplier
    Sawigun, Chutham
    Demosthenous, Andreas
    Pal, Dipankar
    [J]. 2007 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1-3, 2007, : 751 - +
  • [26] A low-voltage, versatile CMOS four-quadrant analogue multiplier
    Chaisayun, I
    Dejhan, K
    [J]. INTERNATIONAL JOURNAL OF ELECTRONICS, 2003, 90 (10) : 635 - 644
  • [27] Compact low-voltage CMOS four-quadrant analogue multiplier
    Sawigun, C.
    Demosthenous, A.
    [J]. ELECTRONICS LETTERS, 2006, 42 (20) : 1149 - 1151
  • [28] Design of a low-voltage BiCMOS four-quadrant analog multiplier
    Guan, Hui
    Tang, Yusheng
    [J]. Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics, 2000, 20 (03): : 270 - 275
  • [29] ANALYSIS OF LINEARITY OF FOUR-QUADRANT ANALOG SIGNAL MULTIPLIERS.
    Timonteev, V.N.
    Kuz'menko, V.P.
    Tkachenko, V.A.
    [J]. 1978, 21 (4 pt 2): : 1016 - 1019
  • [30] A Four-Quadrant Analog Multiplier Based on CMOS Source Coupled Pair
    Chen, Weiping
    Wang, Tianyang
    Xu, Honglei
    Liu, Xiaowei
    [J]. MEMS/NEMS NANO TECHNOLOGY, 2011, 483 : 487 - 491