CMOS Fully Differential CMOS Four-Quadrant Analog Multiplier

被引：2

作者：

Mahmoud, Soliman A. ^{[1
]}

机构：

[1] German Univ Cairo, Dept Elect & Elect Engn, Cairo, Egypt

来源：

2008 INTERNATIONAL CONFERENCE ON MICROELECTRONICS | 2008年

关键词：

Multiplier; Voltage mode; Fully Differential; Frequency doublers; Amplitude Modulators;

D O I：

10.1109/ICM.2008.5393543

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new low voltage low power fully differential CMOS four-quadrant analog multiplier based on the operation of MOS transistors in saturation region is given. The proposed four-quadrant voltage-mode multiplier was confirmed by using PSPICE simulation and found to have good linearity with wide input dynamic range. The static power consumption is 0.326 mW, the input voltage range is +/- 0.75 V from +/- 1V supply, the bandwidth is 16MHz at 1K Omega//10pF load, the output referred noise voltage is less than 10 nV/root Hz in 1K Omega, and the maximum linearity error is less than 1% at +/- 0.5 V input voltage.

引用

页码：27 / 30

页数：4

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