Low voltage four-quadrant analog multiplier using square-root circuit based on CMOS pair

被引：0
|
作者：
Hyogo, Akira [1 ]
Fukutomi, Yoshio [1 ]
Sekine, Keitaro [1 ]
机构：
[1] Science Univ of Tokyo, Chiba, Japan
来源：
Proceedings - IEEE International Symposium on Circuits and Systems | 1999年 / 2卷
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [1] Low voltage four-quadrant analog multiplier using square-root circuit based on CMOS pair
    Hyogo, A
    Fukutomi, Y
    Sekine, K
    [J]. ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2: ANALOG AND DIGITAL CIRCUITS, 1999, : 274 - 277
  • [2] A low voltage supply four-quadrant analog multiplier circuit
    Sakul, Chalwat
    [J]. PROCEEDINGS OF THE 3RD INTERNATIONAL CONFERENCE ON ANTI-COUNTERFEITING, SECURITY, AND IDENTIFICATION IN COMMUNICATION, 2009, : 258 - 261
  • [3] A low voltage supply four-quadrant analog multiplier circuit
    Sakul, Chaiwat
    Pongthana, Kajornsak
    [J]. 2009 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATION SYSTEMS (ISPACS 2009), 2009, : 292 - +
  • [4] A Four-Quadrant Analog Multiplier Based on CMOS Source Coupled Pair
    Chen, Weiping
    Wang, Tianyang
    Xu, Honglei
    Liu, Xiaowei
    [J]. MEMS/NEMS NANO TECHNOLOGY, 2011, 483 : 487 - 491
  • [5] Low Voltage High Performance CMOS Current Mode Four-Quadrant Analog Multiplier Circuit
    Ettaghzouti, Thouraya
    Khlaifia, Dalila
    Zitouni, Naoufel
    Hassen, Nejib
    [J]. RADIOENGINEERING, 2022, 31 (02) : 216 - 223
  • [6] Compact low-voltage CMOS analog divider using a four-quadrant multiplier and biasing control circuit
    Padilla-Cantoya, Ivan
    [J]. 2012 IEEE 55TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2012, : 502 - 505
  • [7] Low-voltage four-quadrant analog multiplier
    Motamed, A
    Hwang, C
    Ismail, M
    [J]. 38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1996, : 273 - 276
  • [8] Low-voltage CMOS four-quadrant multiplier
    Liu, SI
    Chang, CC
    [J]. ELECTRONICS LETTERS, 1997, 33 (03) : 207 - 208
  • [9] Four-quadrant analog multiplier based on CMOS inverters
    Machowski, W.
    Kuta, S.
    Jasielski, J.
    [J]. PROCEEDINGS OF THE INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2006, : 290 - +
  • [10] Four-quadrant analog multiplier based on CMOS inverters
    Witold Machowski
    Stanisław Kuta
    Jacek Jasielski
    [J]. Analog Integrated Circuits and Signal Processing, 2008, 55 : 249 - 259
12345