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- [11] Automatic Concolic Test Generation with Virtual Prototypes for Post-silicon Validation 2013 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2013, : 303 - 310
- [12] Efficient Post-Silicon Validation of Network-on-Chip using Wireless Links 2019 32ND INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2019 18TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2019, : 371 - 376
- [13] On Signal Tracing in Post-Silicon Validation 2010 15TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC 2010), 2010, : 259 - 264
- [14] Custom On-Chip Sensors for Post-Silicon Failing Path Isolation in the Presence of Process Variations DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2012), 2012, : 1591 - 1596
- [15] Post-Silicon Validation, Debug and Diagnosis 2013 26TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2013 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2013, : LXIII - LXV
- [16] Tutorial: Post-Silicon Validation and Diagnosis 2016 29TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2016 15TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2016, : 9 - 10
- [17] 3D on-chip networking technology based on post-silicon devices for future networks-on-chip. 2006 1ST INTERNATIONAL CONFERENCE ON NANO-NETWORKS AND WORKSHOPS, 2006, : 105 - 109
- [18] Pattern Generation for Post-Silicon Timing Validation Considering Power Supply Noise 2014 IEEE 23RD NORTH ATLANTIC TEST WORKSHOP (NATW), 2014, : 61 - 64
- [19] Security Capsules: An Architecture for Post-Silicon Security Assertion Validation for Systems-on-Chip 2021 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2021), 2021, : 248 - 253
- [20] Random Pattern Generation for Post-Silicon Validation of DDR3 SDRAM 2015 IEEE 33RD VLSI TEST SYMPOSIUM (VTS), 2015,