共 50 条
- [32] QED Post-Silicon Validation and Debug Invited Abstract 2014 14TH INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC), 2014, : 62 - 62
- [33] ISTA: An Embedded Architecture for Post-silicon Validation in Processors 2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2009, : 593 - 596
- [34] Dynamic Trace Signal Selection for Post-Silicon Validation 2013 26TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2013 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID), 2013, : 302 - 307
- [35] On bypassing blocking bugs during post-silicon validation PROCEEDINGS OF THE 13TH IEEE EUROPEAN TEST SYMPOSIUM: ETS 2008, 2008, : 69 - 74
- [36] Post-Silicon Validation and Calibration of Hardware Security Primitives 2014 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2014, : 29 - 34
- [38] Space Sensitive Cache Dumping for Post-silicon Validation DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 497 - 502
- [40] Functional Post-Silicon Diagnosis and Debug for Networks-on-Chip 2012 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2012, : 557 - 563