Fused Modulo 2n-1 Add-Multiply Unit

被引：0

作者：

Tsoumanis, Kostas ^{[1
]}

Pekmestzi, Kiamal ^{[1
]}

Efstathiou, Constantinos ^{[2
]}

机构：

[1] Natl Tech Univ Athens, Sch Elect & Comp Engn, Athens, Greece

[2] Technol Inst Athens, Dept Elect Engn, Athens, Greece

来源：

2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2014年

关键词：

Modulo 2(n)-1; residue number system; RNS; addition; multiplication; fused add-multiply unit; IMPLEMENTATION;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Complex arithmetic operations are widely used in Digital Signal Processing (DSP) applications. Targeting to increase performance, in this work, we focus on optimizing the design of the modulo 2(n) - 1 Add-Multiply (AM) operation. We incorporate in the design the direct recoding of the sum of two numbers in its Modified Booth (MB) form. Compared to the conventional design of first instantiating a modulo 2(n) - 1 adder and then, driving its output to a modulo 2(n) - 1 multiplier, the proposed fused AM design yields considerable reductions in terms of critical delay, area complexity and power consumption.

引用

页码：40 / 43

页数：4

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