A Physics-Based Model of Double-Gate Tunnel FET for Circuit Simulation

被引:6
|
作者
Narendiran, A. [1 ]
Akhila, K. [2 ]
Bindu, B. [3 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Madras, Tamil Nadu, India
[2] Tata Consultancy Serv Ctr, Infopk, Cochin, Kerala, India
[3] VIT Univ, Sch Elect Engn SENSE, Madras, Tamil Nadu, India
关键词
Band-to-band tunnelling; full adder; low power; sub-threshold slope; tunnel FET; VLSI circuits; TRANSISTORS; LENGTH;
D O I
10.1080/03772063.2015.1082443
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Tunnel FETs (TFETs) having better ON-OFF switching performance is an alternative nano-device that replaces MOSFET (metal oxide field effect transistor) in low-power VLSI (very large scale integration) circuits. The physics-based models of TFETs are essential to integrate with circuit simulators for design and optimization of TFET-based circuits. There is no built-in TFET model available in any commercial circuit simulators. This paper presents the development of an accurate physics-based model for double-gate TFET and its integration in Cadence circuit simulator SPECTRE. The model captures all device physics and is evaluated for various device parameters such as channel length, oxide thickness, and high- dielectrics and validated with results from TCAD (Technology Computer Aided Design) Sentaurus. The integrated model is used to develop digital libraries of logic gates and adders. These digital libraries can be used to design TFET-based VLSI circuits. This method of integration using physics-based model of TFET, compared to look-up table approach which is purely data-driven, gives flexibility to circuit designers to design TFET-based low-power circuits taking into account the dependence on bias, temperature, scaling, and other process parameters.
引用
收藏
页码:387 / 393
页数:7
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