Productivity Improvement of Copper Pillar Flip-chip Package by Pre-applied Materials and Press Machine

被引：0

作者：

Motomura, Koji ^{[1
]}

Maruo, Hiroki ^{[1
]}

Tie, Wanyu ^{[1
]}

Eifuku, Hideki ^{[1
]}

Sakemi, Shoji ^{[1
]}

Sakai, Tadahiko ^{[1
]}

机构：

[1] Panason Factory Solut Co Ltd, Toyonaka, Osaka 5610854, Japan

来源：

2012 2ND IEEE CPMT SYMPOSIUM JAPAN | 2012年

关键词：

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

In this report, authors describe improvement effort of fine pitch flip-chip interconnection based on pre-applied material process. For evaluation, IC with copper pillar bumps (50 mu m pitch) and organic boards (FR-5) have been used. NCF and B-stage material have been used as pre-applied connecting material. As a result, we have developed temporary alignment and subsequent batch bonding process to improve productivity. By adjusting the bonding conditions, stable initial conductions of assembled packages have been achieved. And two reliability tests (TCT and PCT) have been carried out successfully. It becomes possible that flip-chip package was assembled within reduced process time of a bonding machine. Therefore, bonding throughput is improved considerably.

引用

页数：4

共 46 条

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