Mesh-connected rings topology for network-on-chip

被引：2

作者：

Liu, You-Yao ^{[1
]}

Gao, Meng ^{[1
]}

机构：

[1] School of Electronic Engineering, Xi'an University of Posts and Telecommunications, Xi'an 710121, China

来源：

Journal of China Universities of Posts and Telecommunications | 2013年 / 20卷 / 05期

基金：

中国国家自然科学基金;

关键词：

Routers - Interconnection networks (circuit switching) - Network-on-chip - Semiconductor device manufacture - Economic and social effects - Programmable logic controllers - Distributed computer systems - Mesh generation - Computer architecture - Integrated circuit interconnects - Servers - Network architecture - Routing algorithms;

D O I：

10.1016/S1005-8885(13)60086-2

中图分类号：

学科分类号：

摘要：

With the feature size of semiconductor technology reducing and intellectual property (IP) cores increasing, on-chip interconnection network architectures have a great influence on the performance and area of system-on-chip (SoC) design. Focusing on trade-off performance, cost and implementation, a regular network-on-chip (NoC) architecture which is mesh-connected rings (MCR) interconnection network is proposed. The topology of MCR is simple, planar and scalable in architecture, which combines mesh with ring. A detailed theoretical analysis for MCR and mesh is given, and a simulation analysis based on the virtual channel router with wormhole switching is also presented. The results compared with the general mesh architecture show that MCR has better performance, especially in local traffics and low loads, and lower cost. © 2013 The Journal of China Universities of Posts and Telecommunications.

引用

页码：30 / 36

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