Performance simulation of multi-processor systems based on load reallocation

被引:0
|
作者
Jaakola, Marko
机构
来源
VTT Publications | 2009年 / 717期
关键词
D O I
暂无
中图分类号
学科分类号
摘要
43
引用
收藏
页码:1 / 65
相关论文
共 50 条
  • [21] Separate processor process and memory process in multi-processor operating systems
    Liu, Fu-Yan
    You, Jin-Yuan
    Jisuanji Yanjiu yu Fazhan/Computer Research and Development, 2002, 39 (09): : 1138 - 1143
  • [22] A Configurable Simulation Model for Mixed-Criticality Multi-Processor Systems-on-Chips
    Ahmadian, Hamidreza
    Obermaisser, Roman
    2017 IEEE 4TH INTERNATIONAL CONFERENCE ON KNOWLEDGE-BASED ENGINEERING AND INNOVATION (KBEI), 2017, : 360 - 366
  • [23] Proactive Load Balancing to Reduce Unnecessary Thread Migrations on Chip Multi-Processor (CMP) Systems
    Revilla-Duarte, Ulises
    Ramirez-Salinas, Marco A.
    Villa-Vargas, Luis A.
    Tchernykh, Andrei
    COMPUTACION Y SISTEMAS, 2024, 28 (02): : 623 - 645
  • [24] A hardware operating system kernel for multi-processor systems
    Park, Sanggyu
    Hong, Do-Sun
    Chae, Soo-Ik
    IEICE ELECTRONICS EXPRESS, 2008, 5 (09) : 296 - 302
  • [25] ENSEMBLE: A communication layer for embedded multi-processor systems
    Cadot, S
    Kuijlman, F
    Langendoen, K
    van Reeuwijk, K
    Sips, H
    ACM SIGPLAN NOTICES, 2001, 36 (08) : 56 - 63
  • [26] ORGANIZATION OF MULTI-PROCESSOR SYSTEMS FOR IMAGE-PROCESSING
    CANTONI, V
    LECTURE NOTES IN PHYSICS, 1984, 196 : 145 - 157
  • [27] Arbiter synthesis approach for SoC multi-processor systems
    Zitouni, Abdelkrim
    Tourki, Rached
    COMPUTERS & ELECTRICAL ENGINEERING, 2008, 34 (01) : 63 - 77
  • [28] Nonlinear finite element implementation on multi-processor systems
    Owen, D.R.J.
    Alves, J.S.R.
    Mitchell, F.
    Mitchell, G.P.
    Proceedings of the European Conference on Structural Dynamics, 1991,
  • [29] Energy-performance tradeoffs for the shared memory in multi-processor systems-on-chip
    Patel, K
    Macii, E
    Poncino, M
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2004, : 361 - 364
  • [30] A high performance multi-processor architecture for an on-board SAR processor system
    Helfers, T
    Pike, T
    Liebstückel, U
    Wolframm, A
    Bierens, L
    Moreira, A
    DASIA 2000: DATA SYSTEMS IN AEROSPACE, PROCEEDINGS, 2000, 457 : 205 - 210