共 50 条
- [21] An integrated approach to design of processor arrays with a systolic organization of calculations Kibernetika i Sistemnyj Analiz, 2002, (06): : 3 - 15
- [22] SYSTEMATIC DESIGN OF SYSTOLIC ARRAYS FROM AFFINE RECURRENCE TECHNIQUES COMPUTING SYSTEMS, 1993, 8 (03): : 144 - 153
- [24] DESIGN OF BIT-LEVEL SYSTOLIC ARRAYS WITH DEPENDENCE GRAPH SYSTOLIC ARRAY PROCESSORS, 1989, : 439 - 448
- [28] TAGGED SYSTOLIC ARRAYS IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1991, 138 (05): : 289 - 294