TAGGED SYSTOLIC ARRAYS

被引：1
|
作者：
SARKAR, S
MAJUMDAR, AK
机构：
[1] Indian Inst of Technology, Kharagpur
来源：
IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES | 1991年 / 138卷 / 05期
关键词：
FAST-FOURIER TRANSFORM; SYSTOLIC ARRAY; TAGGED SYSTOLIC ARRAY; VLSI;
D O I：
10.1049/ip-e.1991.0039
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Design of systolic arrays from a set of non-linear and nonuniform recurrence equations is discussed. A systematic method for deriving a systolic design in such cases is presented. A novel architectural idea, termed a tagged systolic array (TSA), is introduced. The design methodology described broadens the class of algorithms amenable for tagged systolic array implementation. The methodology is illustrated by deriving a systolic design for the fast Fourier transform.
引用
收藏
页码：289 / 294
页数：6
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