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- [2] SEU Tolerant SRAM Cell 2011 12TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2011, : 597 - 602
- [4] SEU Tolerant Robust Memory Cell Design 2012 IEEE 18TH INTERNATIONAL ON-LINE TESTING SYMPOSIUM (IOLTS), 2012, : 13 - 18
- [5] A novel SEU tolerant memory cell for space applications IEICE ELECTRONICS EXPRESS, 2018, 15 (17):
- [6] SEU-HARDENED SRAM CELL 2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2014,
- [7] SRAM cell design protected from SEU upsets 14TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS, 2008, : 169 - 170
- [8] A SEU/MBU Tolerant SRAM Bit Cell Based on Multi-Input Gate 2017 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONIC ENGINEERING (ICEEE 2017), 2017, : 251 - 255
- [10] Low power and high write speed SEU tolerant SRAM data cell design Science China Technological Sciences, 2015, 58 : 1983 - 1988