AN SEU TOLERANT MEMORY CELL DERIVED FROM FUNDAMENTAL-STUDIES OF SEU MECHANISMS IN SRAM

被引：32
|
作者：
WEAVER, HT
AXNESS, CL
MCBRAYER, JD
BROWNING, JS
FU, JS
OCHOA, A
KOGA, R
机构：
来源：
IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1987年 / 34卷 / 06期
关键词：
D O I：
10.1109/TNS.1987.4337466
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：1281 / 1286
页数：6
相关论文
共 50 条
  • [31] Automated synthesis of SEU tolerant architectures from OO descriptions
    Chiusano, S
    Di Carlo, S
    Prinetto, P
    PROCEEDINGS OF THE EIGHTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, 2002, : 26 - 31
  • [32] TMR Group Coding Method for Optimized SEU and MBU Tolerant Memory Design
    Jin, Yi
    Huan, Yuxiang
    Chu, Haoming
    Zou, Zhuo
    Zheng, Lirong
    2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,
  • [33] SPICE ANALYSIS OF THE SEU SENSITIVITY OF A FULLY DEPLETED SOI CMOS SRAM CELL
    ALLES, ML
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1994, 41 (06) : 2093 - 2097
  • [34] SEU cross sections derived from a diffusion analysis
    Edmonds, LD
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1996, 43 (06) : 3207 - 3217
  • [35] SEU cross sections derived from a diffusion analysis
    Edmonds, Larry D.
    IEEE Transactions on Nuclear Science, 1996, 43 (6 Pt 2): : 3207 - 3217
  • [36] Process technique for SEU reliability improvement of deep sub-micron SRAM cell
    Saxena, PK
    Bhat, N
    SOLID-STATE ELECTRONICS, 2003, 47 (04) : 661 - 664
  • [37] Design of a hybrid non-volatile SRAM cell for concurrent SEU detection and correction
    Junsangsri, Pilin
    Han, Jie
    Lombardi, Fabrizio
    INTEGRATION-THE VLSI JOURNAL, 2016, 52 : 156 - 167
  • [38] Design of a Novel 12T Radiation Hardened Memory Cell Tolerant to Single Event Upsets (SEU)
    Hu, Chunyan
    Yue, Suge
    Lu, Shijin
    2017 2ND IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS AND MICROSYSTEMS (ICICM), 2017, : 182 - 185
  • [39] SIMULATED SEU HARDENED SCALED CMOS SRAM CELL DESIGN USING GATED RESISTORS
    ROCKETT, LR
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1992, 39 (05) : 1532 - 1541
  • [40] 2 CMOS MEMORY CELLS SUITABLE FOR THE DESIGN OF SEU-TOLERANT VLSI CIRCUITS
    VELAZCO, R
    BESSOT, D
    DUZELLIER, S
    ECOFFET, R
    KOGA, R
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1994, 41 (06) : 2229 - 2234
12345