A CMOS 2.4-GBPS 16X16 ATM SWITCH CHIP SET

被引：0
|
作者：
HISAMATSU, H
MORITA, T
KARUBE, S
SAKAMOTO, M
KURIKI, R
MATSUMOTO, Y
机构：
来源：
NEC RESEARCH & DEVELOPMENT | 1994年 / 35卷 / 04期
关键词：
ATM; ATM SWITCH; ATOM (ATM OUTPUT BUFFER MODULAR SWITCH); VLSI; CMOS; PARALLEL-BIT SYNCHRONIZATION SCHEME;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The authors have developed a CMOS chip set for a 2.4 Gbps 16 x 16 ATM switch. In order to realize higher link speed and more maximum switch throughput than past development ATOM (ATM Output buffer Modular switch), a parallel-bit synchronization scheme without external timing adjustment, ECL-compatible I/O buffers and a newly LSI package that has thin film termination resistors have been developed. This chip set consists of three LSI chips with 0.55 mu m CMOS technology. From the result of evaluation of these LSI chips, the authors have achieved a link speed of 2.4 Gbps.
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页码：458 / 469
页数：12
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