Gate-Level Circuit Reliability Analysis: A Survey

被引:8
|
作者
Xiao, Ran [1 ]
Chen, Chunhong [1 ]
机构
[1] Univ Windsor, Dept Elect & Comp Engn, Windsor, ON N9B 3P4, Canada
关键词
D O I
10.1155/2014/529392
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Circuit reliability has become a growing concern in today's nanoelectronics, which motivates strong research interest over the years in reliability analysis and reliability-oriented circuit design. While quite a few approaches for circuit reliability analysis have been reported, there is a lack of comparative studies on their pros and cons in terms of both accuracy and efficiency. This paper provides an overview of some typical methods for reliability analysis with focus on gate-level circuits, large or small, with or without reconvergent fanouts. It is intended to help the readers gain an insight into the reliability issues, and their complexity as well as optional solutions. Understanding the reliability analysis is also a first step towards advanced circuit designs for improved reliability in the future research.
引用
收藏
页数:12
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