A second-order two-channel time-interleaved delta-sigma modulator circuit design

被引:0
|
作者
Mahmud Abdoli
Esmaeil Najafiaghdam
机构
[1] Sahand University of Technology,Microelectronic Research Lab., EE Department
关键词
Delta-sigma modulator; Time interleaved delta sigma; High speed analog to digital converter; Block digital filtering; Noise coupled time interleaved delta-sigma modulator;
D O I
暂无
中图分类号
学科分类号
摘要
Among analog to digital converters, high speed ADCs are accomplished by the time interleaved delta-sigma modulators. The block digital filtering (BDF) method is a proper method to implement the Time-interleaved Delta-sigma modulators (TIDSM). In this method, M delta-sigma modulators are placed in parallel and the sampling rate in each of the parallel channel will be fs\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$${\mathrm{f}}_{\mathrm{s}}$$\end{document},whereby the effective sampling rate becomeM∗fs\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\mathrm{M}*{\mathrm{f}}_{\mathrm{s}}$$\end{document}. The serious disadvantage of the TIDSM based on BDF is that its NTF is equal to the standard structure. The time interleaved structure described in this paper is based on Noise Coupled time interleaved delta-sigma modulator (NC-TIDSM) that uses a noise-coupled between the channels. In this modulator not only the effective sampling is increased but also the overall noise transfer function order is increased by two or more without any additional active element. For implementation of the NC-TIDSM structure, the theoretical relations are proved and then these results have been verified by implementation of the second-order two-channel NC-TIDSM in circuit level and in an 180 nm CMOS technology. Using a 1.8 V supply, the SNDR of 62 dB in a 10 MHz signal band is achieved for the second-order two-channel NC-TIDSM.
引用
收藏
页码:457 / 466
页数:9
相关论文
共 50 条
  • [21] Domino Free 4-Path Time-Interleaved Second Order Sigma-Delta Modulator
    Kye-shin Lee
    Yunyoung Choi
    Franco Maloberti
    Analog Integrated Circuits and Signal Processing, 2005, 43 : 225 - 235
  • [22] Domino free 4-path time-interleaved second order sigma-delta modulator
    Lee, KS
    Choi, YY
    Maloberti, F
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2005, 43 (03) : 225 - 235
  • [23] A novel noise-coupled time-interleaved delta-sigma modulator with analysis of practical limitations
    Mahmud Abdoli
    Esmaeil Najafi Aghdam
    Firoz Hemmati
    Analog Integrated Circuits and Signal Processing, 2020, 102 : 389 - 401
  • [24] Low-clock-speed time-interleaved architecture for a polar delta-sigma modulator transmitter
    Erfani Majd, Nasser
    Fani, Rezvan
    ETRI JOURNAL, 2023, 45 (01) : 150 - 162
  • [25] Analysis of time-interleaved delta-sigma analog to digital converter
    Nguyen, V
    Loumeau, P
    Naviner, JF
    IEEE 55TH VEHICULAR TECHNOLOGY CONFERENCE, VTC SPRING 2002, VOLS 1-4, PROCEEDINGS, 2002, : 1594 - 1597
  • [26] Efficient architectures for time-interleaved oversampling delta-sigma converters
    Kozak, M
    Karaman, M
    Kale, I
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2000, 47 (08): : 802 - 810
  • [27] A novel noise-coupled time-interleaved delta-sigma modulator with analysis of practical limitations
    Abdoli, Mahmud
    Aghdam, Esmaeil Najafi
    Hemmati, Firoz
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2020, 102 (02) : 389 - 401
  • [28] Design and Analysis of an Ultra-Low-Power Second-Order Asynchronous Delta-Sigma Modulator
    Akbari, Meysam
    Hashemipour, Omid
    Moradi, Farshad
    CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2017, 36 (12) : 4919 - 4936
  • [29] A power-efficient two-channel time-interleaved ΣΔ modulator for broadband applications
    Lee, Kye-Shin
    Kwon, Sunwoo
    Maloberti, Franco
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (06) : 1206 - 1215
  • [30] A second-order continuous-time delta-sigma modulator with double self noise coupling
    Haiyue Yan
    Lin He
    Yan Ye
    Fujiang Lin
    Analog Integrated Circuits and Signal Processing, 2019, 99 : 251 - 259