Built-in self-test and defect tolerance in molecular electron ics-based nanofabrics

被引:5
|
作者
Wang, Zhangle [1 ]
Chakrabarty, Krishnendu [1 ]
机构
[1] Duke Univ, Dept Elect & Comp Engn, Durham, NC 27708 USA
关键词
nanotechnology; nanofabric; BIST; defect tolerance; molecular electronics; CAEN; chemically assembled; reconfiguration;
D O I
10.1007/s10836-006-0550-z
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We propose a built-in self-test (BIST) procedure for nanofabrics implemented using chemically assembled electronic nanotechnology. Several fault detection configurations are presented to target stuck-at faults, shorts, opens, and connection faults in nanoblocks and switchblocks. The detectability of multiple faults in blocks within the nanofabric is also considered. We present an adaptive recovery procedure through which we can identify defect-free nanoblocks and switchblocks in the nanofabric-under-test. The proposed BIST, recovery, and defect tolerance procedures are based on the reconfiguration of the nanofabric to achieve complete fault coverage for different types of faults. We show that a large fraction of defect-free blocks can be recovered using a small number of BIST configurations. We also present simple bounds on the recovery that can be achieved for a given defect density. Simulation results are presented for various nanofabric sizes, different defect densities, and for random and clustered defects. The proposed BIST procedure is well suited for regular and dense architectures that have high defect densities.
引用
收藏
页码:145 / 161
页数:17
相关论文
共 50 条
  • [31] A Scan-Chain-Based Built-in Self-Test for ILV in Monolithic 3-D ICs
    Chen, Tian
    Ding, Ruiyuan
    Liu, Jun
    Yuan, Xiaohui
    Lu, Yingchun
    Liang, Huaguo
    Liu, Siyuan
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2024, 73
  • [32] Survey on built-in self-test and built-in self-repair of embedded memories
    Jiang, Jian-Hui
    Zhu, Wei-Guo
    Tongji Daxue Xuebao/Journal of Tongji University, 2004, 32 (08): : 1050 - 1056
  • [33] Research on Spacecraft Rapid Test Technology Based on Built-in Self-test
    Yang Tongzhi
    Yu Lingfeng
    Xu Miner
    Zeng Qi
    Liu Tingyu
    PROCEEDINGS OF 2019 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS (ICEMI), 2019, : 1593 - 1598
  • [34] Fully Deterministic Storage Based Logic Built-In Self-Test
    Gopalsamy, Subashini
    Pomeranz, Irith
    2023 IEEE 41ST VLSI TEST SYMPOSIUM, VTS, 2023,
  • [35] A Built-In Self-Test Scheme for the Post-Bond Test of TSVs in 3D ICs
    Huang, Yu-Jen
    Li, Jin-Fu
    Chen, Ji-Jan
    Kwai, Ding-Ming
    Chou, Yung-Fa
    Wu, Cheng-Wen
    2011 IEEE 29TH VLSI TEST SYMPOSIUM (VTS), 2011, : 20 - 25
  • [36] Optimization of the store-and-generate based built-in self-test
    Ubar, R.
    Jervan, G.
    Kruus, H.
    Orasson, E.
    Aleksejev, I.
    2006 INTERNATIONAL BALTIC ELECTRONICS CONFERENCE, PROCEEDINGS, 2006, : 199 - +
  • [37] Processor-based built-in self-test for embedded DRAM
    IBM Microelectronics Div, Essex Junction, United States
    IEEE J Solid State Circuits, 11 (1731-1740):
  • [38] TEST SCHEDULING AND CONTROL FOR VLSI BUILT-IN SELF-TEST
    CRAIG, GL
    KIME, CR
    SALUJA, KK
    IEEE TRANSACTIONS ON COMPUTERS, 1988, 37 (09) : 1099 - 1109
  • [39] RMBITP: a reconfigurable matrix based built-in self-test processor
    VLSI Technology, Richardson, United States
    Microelectron J, 2 (115-127):
  • [40] REALISTIC BUILT-IN SELF-TEST FOR STATIC RAMS
    DEKKER, R
    BEENKER, F
    THIJSSEN, L
    IEEE DESIGN & TEST OF COMPUTERS, 1989, 6 (01): : 26 - 34