Application Specific Architecture of 32-bit Vedic Multiplier

To cope up with the greatly challenging market needs and to meet faster time to market, forced the software industries to develop epic Simulation and Physical Verification and Implementation tools. Using the traditional integrated circuit design it is no more possible to achieve ambitions of optimized timing, area, power and gate count. However, Field Programmable Gate Array and Application Specific Integrated Circuit are the major breakthrough given by the recent technological revolution, by using which designer can go for hardware prototyping and product design in promising time. Application Specific Integrated Circuit (ASIC) is the Integrated Circuit designed for specific application. It is an Digital, Analog or Mixed Signal architecture designed specifically to meet the constraints set by the specific application. With ASIC, superior performance is promised even for highly complex and dense architecture. Through this literature, a detailed ASIC flow is disclosed considering the 32-bit Vedic Multiplier architecture, implemented using concurrent Hardware Description Language. Vedic Mathematics is the ancient indian computation techniques which proposes a different procedures for faster execution of mathematical statements. It's execution for different case studies are proved through different sutras (formulae) and up-sutras (sub-formulae).