NBTI reliability analysis for a 90nm CMOS technology

被引：0
|
作者：
Puchner, H [1 ]
Hinh, L [1 ]
机构：
[1] Cypress Semicond Inc, Technol R&D, San Jose, CA 95134 USA
来源：
ESSDERC 2004: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE | 2004年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We present a comprehensive empirical study to investigate the impact of NBTI on device performance and reliability. The NBTI lifetime is calculated for different lifetime criteria such as 10%Idsat or 50mVVt shift for different bias conditions, temperature, duty cycles, gate length, and gate width dependence to allow a true comparison between different methodologies. Finally, a circuit level implementation approach is presented to estimate the NBTI device level reliability on a circuit level. Therefore the absolute threshold voltage shift is calculated and inserted into the spice level transistor model for comer simulations.
引用
收藏
页码：257 / 260
页数：4
相关论文
共 50 条
  • [1] Voltage acceleration NBTI study for a 90nm CMOS technology
    Wen, SJ
    Hinh, L
    Puchner, H
    [J]. 2003 IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP - FINAL REPORT, 2003, : 147 - 148
  • [2] Comparative analysis of comparators in 90nm CMOS Technology
    Khatak, Anil
    Kumar, Manoj
    Dhull, Sanjeev
    [J]. 2018 INTERNATIONAL CONFERENCE ON POWER ENERGY, ENVIRONMENT AND INTELLIGENT CONTROL (PEEIC), 2018, : 493 - 500
  • [3] Reliability Study of the 90nm CMOS Inverter
    Hadi, Dayanasari Abdul
    Soin, Norhayati
    Hatta, S. F. Wan Muhamad
    [J]. ENABLING SCIENCE AND NANOTECHNOLOGY, 2011, 1341 : 181 - 184
  • [4] Product reliability in 90nm CMOS and beyond
    Turner, AA
    [J]. 2005 IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP, FINAL REPORT, 2005, : 163 - 167
  • [5] 90nm generation RF CMOS technology
    Stamper, Anthony
    Bolam, Ronald
    Coolbaugh, Douglas
    Chanda, Kaushik
    Collins, David
    Dunn, James
    He, Zhong-Xiang
    Erturk, Mete
    Eshun, Ebenezer
    Lindgren, Peter
    McDevitt, Thomas
    Moon, Matthew
    Porth, Bruce
    Rathore, Hazara
    Onge, Stephen St.
    Snavely, Colleen
    Tiersch, Matthew
    Winslow, Arthur
    Zwonik, Robert
    [J]. ADVANCED METALLIZATION CONFERENCE 2007 (AMC 2007), 2008, 23 : 363 - 369
  • [6] Design and Analysis of Charge Pump for PLL at 90nm CMOS Technology
    Chandra, Ravi
    Anurag
    [J]. 2015 2ND INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN ENGINEERING & COMPUTATIONAL SCIENCES (RAECS), 2015,
  • [7] Power analysis of Flash-ADC in 90nm CMOS Technology
    Khatak, Anil
    Kumar, Manoj
    Dhull, Sanjeev
    [J]. 2018 INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY, ELECTRONICS, AND COMPUTING SYSTEMS (SEEMS), 2018,
  • [8] Performance Analysis and Simulation of Spiral and Active Inductor in 90nm CMOS Technology
    Sayem, Ahmed S.
    Rashid, Sakera
    Akter, Sohely
    Faruqe, Omar
    Hossam-E-Haider, Md
    [J]. 2018 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING AND INFORMATION & COMMUNICATION TECHNOLOGY (ICEEICT), 2018, : 570 - 575
  • [9] Analysis and Evaluation of Charge-pumps Realizable in 90nm CMOS Technology
    Nagy, Gabriel
    Stopjakova, Viera
    Arbet, Daniel
    [J]. 2014 24TH INTERNATIONAL CONFERENCE RADIOELEKTRONIKA (RADIOELEKTRONIKA 2014), 2014,
  • [10] A 60 GHz power amplifier in 90nm CMOS technology
    Heydari, Babak
    Bohsali, Mounir
    Adabi, Ehsan
    Niknejad, Ali M.
    [J]. PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2007, : 769 - 772
12345