A fast optimal robust path delay fault testable adder

被引：2
|
作者：
Becker, B [1 ]
Drechsler, R [1 ]
Krieger, R [1 ]
Reddy, SM [1 ]
机构：
[1] UNIV FREIBURG,INST COMP SCI,D-79110 FREIBURG,GERMANY
来源：
EUROPEAN DESIGN & TEST CONFERENCE 1996 - ED&TC 96, PROCEEDINGS | 1996年
关键词：
D O I：
10.1109/EDTC.1996.494346
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：491 / 498
页数：8
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