Agile All-Digital DPD Feedback Loop

被引：5

作者：

Prata, Andre ^{[1
]}

Santos, Jorge C. ^{[1
]}

Oliveira, Arnaldo S. R. ^{[1
]}

Carvalho, Nuno Borges ^{[1
]}

机构：

[1] Univ Aveiro, Inst Telecomunicacoes, Dept Elect Telecomunicacoes & Informat, P-3810193 Aveiro, Portugal

来源：

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES | 2017年 / 65卷 / 07期

关键词：

Analog-to-digital converters (ADCs); digital predistortion (DPD); field programmable gate array (FPGA); PA linearization; pulse-width modulation (PWM); RF POWER-AMPLIFIERS; PREDISTORTION; TRANSMITTERS;

D O I：

10.1109/TMTT.2017.2654678

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents an original agile all-digital feedback loop receiver system for power amplifier (PA) linearization using digital predistortion (DPD). The proposed feedback loop is based on a radio-frequency pulse-width modulation analog-to-digital converter. For proof of concept, the system was implemented using a single field programmable gate array chip. Additionally, the system is also presented in a remote version, suitable for future centralized radio access network, in which the DPD can be performed in a central unit, far from the PA. Measurement results of important DPD metrics, such as adjacent channel power ratio (ACPR) and error vector magnitude (EVM), are presented and evaluated to verify the correct functioning of the proposed feedback loop. The obtained results demonstrate the system's agility and high analog input bandwidth from a few megahertzes up to almost 4 GHz, while maintaining the LTE ACPR and EVM requirements.

引用

页码：2476 / 2484

页数：9

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