A novel Time-To-Digital converter with 150 ps time resolution and 2.5 ns pulse-pair resolution

被引：0
|
作者：
Andaloussi, MS [1 ]
Boukadoum, M [1 ]
Aboulhamid, EM [1 ]
机构：
[1] Univ Quebec, Montreal, PQ H3C 3P8, Canada
来源：
ICM 2002: 14TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS | 2002年
关键词：
TDC; Time-to-digital converter; time of flight; mass spectrometer; FPGA;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A novel Time-to-Digital converter (TDC) architecture, based on a two-dimensional time-delay matrix is presented This architecture offers the advantage, over using a. regular linear time-delay chain, of minimal pulse-pair resolution and. dead time. The architecture was implemented on a XCV300 Virtex FPGA from Xilinx. The resulting TDC allows time measurements over a 21-ms interval with 150 ps resolution, and 2.5 ns maximum pulse-pair resolution and dead time.
引用
收藏
页码：123 / 126
页数：4
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