High-frequency compact analytical noise model of gate-all-around MOSFETs

被引:1
|
作者
Lazaro, A. [1 ]
Nae, B. [1 ]
Muthupandian, C. [1 ]
Iniguez, B. [1 ]
机构
[1] Univ Rovira & Virgili, Dept Engn Elect Elect & Automat, Tarragona 43007, Spain
关键词
DEEP-SUBMICRON MOSFETS; THERMAL NOISE; SOI MOSFETS; CMOS; RF; PERFORMANCE; DESIGN; CHARGE;
D O I
10.1088/0268-1242/25/3/035015
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Silicon-on-insulator (SOI) MOSFETs are excellent candidates for replacing the current conventional bulk technologies. The most promising SOI devices are based on multiple gate structures, among these the surrounding gate (SGT) MOSFET being one of the best candidates for the downscaling of complementary CMOS technology toward the sub-50 nanometer channel length range. In these devices, the transition frequency f(t) is greatly increased, making them suitable for high-frequency applications. This makes the RF and microwave modeling, as well as high-frequency noise studies of these devices, a matter of utmost importance. In this paper, we present compact expressions to model the drain and gate current noise spectrum densities and their correlation for SGT MOSFETs. Using this model, the SGT MOSFET noise performances are studied. The current and noise models, due to their explicit analytical expressions, can be easily introduced in circuit simulators.
引用
收藏
页数:10
相关论文
共 50 条
  • [41] Analytical Compact Model of Nanowire Junctionless Gate-All-Around MOSFET Implemented in Verilog-A for Circuit Simulation
    Billel Smaani
    Shiromani Balmukund Rahi
    Samir Labiod
    Silicon, 2022, 14 : 10967 - 10976
  • [42] Impact of Dielectric Pocket on Analog and High-Frequency Performances of Cylindrical Gate-All-Around Tunnel FETs
    Pandey, C. K.
    Dash, D.
    Chaudhury, S.
    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 2018, 7 (05) : N59 - N66
  • [43] Analytical Quantum Model for Germanium Channel Gate-All-Around (GAA) MOSFET
    Vimala, P.
    Kumar, Nithin N. R.
    JOURNAL OF NANO RESEARCH, 2019, 59 (137-148) : 137 - 148
  • [44] Characterization and Reliability of III-V Gate-all-around MOSFETs
    Si, Mengwei
    Shin, SangHoon
    Conrad, Nathan J.
    Gu, Jiangjiang
    Zhang, Jingyun
    Alam, Muhammad A.
    Ye, Peide D.
    2015 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2015,
  • [45] Design and optimization considerations for bulk gate-all-around nanowire MOSFETs
    Song, Yi
    Xu, Qiuxia
    Zhou, Huajie
    Cai, Xiaowu
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2009, 24 (10)
  • [46] A Compact Explicit Model for Long-Channel Gate-All-Around Junctionless MOSFETs. Part I: DC Characteristics
    Lime, Francois
    Moldovan, Oana
    Iniguez, Benjamin
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2014, 61 (09) : 3036 - 3041
  • [47] Performance and Variability Studies of InGaAs Gate-all-Around Nanowire MOSFETs
    Conrad, Nathan
    Shin, SangHong
    Gu, Jiangjiang
    Si, Mengwei
    Wu, Heng
    Masuduzzaman, Muhammad
    Alam, Mohammad A.
    Ye, Peide D.
    IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2013, 13 (04) : 489 - 496
  • [48] STATIC CHARACTERISTICS OF GATE-ALL-AROUND SOI MOSFETS AT CRYOGENIC TEMPERATURES
    SIMOEN, E
    CLAEYS, C
    PHYSICA STATUS SOLIDI A-APPLICATIONS AND MATERIALS SCIENCE, 1995, 148 (02): : 635 - 642
  • [49] Drain current modelling of double gate-all-around (DGAA) MOSFETs
    Kumar, Arun
    Bhushan, Shiv
    Tiwari, Pramod Kumar
    IET CIRCUITS DEVICES & SYSTEMS, 2019, 13 (04) : 519 - 525
  • [50] Low temperature single electron characteristics in gate-all-around MOSFETs
    Pott, Vincent
    Bouvet, Didier
    Boucart, Julien
    Tschuor, Lucas
    Moselund, Kirsten E.
    Ionescu, Adrian M.
    ESSDERC 2006: PROCEEDINGS OF THE 36TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2006, : 427 - +