Low Power Implementation of FM0/Manchester Encoding Using SOLS Technique

被引：0

作者：

Nikhade, Rahul N. ^{[1
]}

Charles, Priya ^{[1
]}

机构：

[1] DY Patil Coll Engn, Pune 411044, Maharashtra, India

来源：

2016 INTERNATIONAL CONFERENCE ON AUTOMATIC CONTROL AND DYNAMIC OPTIMIZATION TECHNIQUES (ICACDOT) | 2016年

关键词：

DSRC; SOLS; VLSI; FM0; code; Manchester code; hardware utilization rate (HUR);

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

DSRC (Dedicated Short Range communication) is an emerging technique that permits very high data transmission critical in communications- based active safety applications. DSRC standards usually adopt either FM0 code or Manchester code as a coding technique to enhance signal reliability, to reach dc balance. The code word structure of FM0 and Manchester are different, thus limiting the hardware potential of existing DSRC systems. Similarity oriented logic simplification (SOLS) techniques merges hardware architectures of both FM0 and Manchester and integrated architecture gives better hardware utilization rate (HUR). The performance of this paper is validated on Xilinx ISE design suite 14.7.

引用

页码：333 / 338

页数：6

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