Recent advances in wire bonding, flip chip and lead-free solder for advanced microelectronics packaging

被引：27
|
作者：
Zhong, Z. W. [1 ]
Tee, T. Y.
Luan, J-E.
机构：
[1] Nanyang Technol Univ, Sch MAE, Singapore, Singapore
[2] Amkor Technol Singapore, Singapore, Singapore
[3] STMicroelect, Singapore, Singapore
来源：
MICROELECTRONICS INTERNATIONAL | 2007年 / 24卷 / 03期
关键词：
wires; joining process; soldering;
D O I：
10.1108/13565360710779154
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Purpose - This paper seeks to review recent advances in wire bonding, flip chip and lead-free solder for advanced microelectronics packaging. Design/methodology/approach - Of the 91 journal papers, 59 were published in 2005-2007 and topics related to wire bonding, flip chip and lead-free solder for. advanced microelectronics packaging are reviewed. Findings - Research on advanced wire bonding is continuously performed for advanced and complex applications such as stacked-dies wire bonding, wire bonding of low-k ultra-fine-pitch devices, and copper wire bonding. Owing to its many advantages, flip chip using adhesive has gained more popularity. Research on the reliability of lead-free solder joints is being conducted world-wide. The new challenges, solutions and new developments are discussed in this paper. Research limitations/implications - Because of page limitation of this review paper and the large number of the journal papers available, only a brief review is conducted. Further reading is needed for more details. Originality/value - This review paper attempts to provide introduction to recent developments and the trends in terms of the topics for advanced microelectronics packaging. With the references provided, readers may explore more deeply, focusing on a particular issue.
引用
收藏
页码：18 / 26
页数：9
相关论文
共 50 条
  • [31] High temperature reliability of lead-free solder joints in a flip chip assembly
    Amalu, Emeka H.
    Ekere, Ndy N.
    [J]. JOURNAL OF MATERIALS PROCESSING TECHNOLOGY, 2012, 212 (02) : 471 - 483
  • [32] Lead-Free Flip-Chip Packaging Affects on Ultralow-k Chip Delamination
    Chen, Kuo Ming
    Guu, Yunn Horng
    Lin, Tsung Shu
    [J]. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2012, 2 (12): : 1985 - 1991
  • [33] Flip chip interconnect systems using wire stud bumps and lead free solder
    Zama, S
    Baldwin, DF
    Hikami, T
    Murata, H
    [J]. 50TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 2000 PROCEEDINGS, 2000, : 1111 - 1117
  • [34] Characterisation of lead-free solder pastes for low cost flip-chip bumping
    Jackson, GJ
    Durairaj, R
    Ekere, NN
    [J]. TWENTY SEVENTH ANNUAL IEEE/CPMT/SEMI INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 2002, : 223 - 228
  • [35] Influence of intermetallic properties on reliability of lead-free flip-chip solder joints
    Limaye, Paresh
    Vandevelde, Bart
    Labie, Riet
    Vandepitte, Dirk
    Verlinden, Bert
    [J]. IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2008, 31 (01): : 51 - 57
  • [36] Featured issue: Lead-free solder and packaging
    Arthur Willoughby
    [J]. Journal of Materials Science: Materials in Electronics, 2012, 23 : 1 - 1
  • [37] Featured issue: Lead-free solder and packaging
    Willoughby, Arthur
    [J]. JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS, 2012, 23 (01) : 1 - 1
  • [38] Electromigration behavior of lead-free solder flip chip bumps on NiP/Cu metallization
    Jang, J. W.
    Ramanathan, L. N.
    Frear, D. R.
    [J]. JOURNAL OF APPLIED PHYSICS, 2008, 103 (12)
  • [39] Lead-free flip chip process development
    Gaffney, K
    Poarch, J
    Delaney, D
    [J]. 50TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 2000 PROCEEDINGS, 2000, : 129 - 133
  • [40] Flip chip metallurgies for lead-free solders
    Korhonen, TM
    Hong, SJ
    Korhonen, MA
    Li, CY
    [J]. ELECTRONIC PACKAGING MATERIALS SCIENCE X, 1998, 515 : 79 - 83
12345