General architecture for hardware implementation of Genetic Algorithm

被引:0
|
作者
Tachibana, Tatsuhiro [1 ]
Murata, Yoshihiro [1 ]
Shibata, Naoki [2 ]
Yasumoto, Keiichi [1 ]
Ito, Minoru [1 ]
机构
[1] Nara Inst Sci & Technol, Nara 6300192, Japan
[2] Shiga Univ, Shiga 5228522, Japan
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中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
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页码:291 / +
页数:2
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