共 50 条
- [31] TEST-GENERATION FOR PRESETTABLE SYNCHRONOUS SEQUENTIAL-CIRCUITS [J]. 1989 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS: PROCEEDINGS OF TECHNICAL PAPERS, 1989, : 155 - 158
- [32] A TEST-PATTERN-GENERATION ALGORITHM FOR SEQUENTIAL-CIRCUITS [J]. IEEE DESIGN & TEST OF COMPUTERS, 1991, 8 (02): : 72 - 86
- [33] Generation of test sequences with low power dissipation for sequential circuits [J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2004, E87D (03): : 530 - 536
- [34] Combinational Test Generation for Transition Faults in Acyclic Sequential Circuits [J]. 2008 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING, VOLS 1 AND 2, 2008, : 398 - 402
- [36] A diagnostic test generation procedure for synchronous sequential circuits based on test elimination [J]. INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS, 1998, : 1074 - 1083
- [37] A novel method of test generation for asynchronous circuits [J]. IDT 2007: SECOND INTERNATIONAL DESIGN AND TEST WORKSHOP, PROCEEDINGS, 2007, : 21 - 24
- [38] COMET - A NEW METHOD FOR THE DETERMINISTIC TEST PATTERN GENERATION IN C-CIRCUITS [J]. MICROELECTRONICS AND RELIABILITY, 1994, 34 (11): : 1761 - 1775
- [39] Test generation for sequential circuits using state transition diagram and test generation for combinatorial circuit part [J]. ELECTRONICS AND COMMUNICATIONS IN JAPAN PART II-ELECTRONICS, 2001, 84 (08): : 20 - 28