DESIGN OF NEW SYMMETRICAL NINE LEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES

被引:0
|
作者
Thiyagarajan, Venkatraman [1 ]
Somasundaram, Periasamy [2 ]
机构
[1] SSN Coll Engn, Madras, Tamil Nadu, India
[2] Anna Univ, Madras, Tamil Nadu, India
关键词
Multilevel inverter (MLI); Symmetric; Nine level; Total harmonic distortion (THD); Switching angle; CASCADED MULTILEVEL INVERTER; H-BRIDGE INVERTERS; MINIMUM NUMBER; COMPONENTS; SINGLE; MODULATION; REDUCTION; TOPOLOGY;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Multilevel inverter plays an important role in the field of modern power electronics. The objective of this paper is to design and simulate the modified symmetric multilevel inverter topology with reduced number of switches. The proposed inverter topology able to synthesize nine level output voltage during symmetric operation using four de voltage sources and eight main switches. The different methods of calculating the switching angles were discussed in this paper. The MATLAB/Simulink software is used to simulate the proposed inverter. The performance of the proposed nine level inverter is analysed and the corresponding simulation and hardware results are presented in this paper. The experimental results justify the simulated response and the practical feasibility of the proposed nine level inverter topology for use in the field.
引用
收藏
页码:196 / 201
页数:6
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