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- [1] Read and write circuit assist techniques for improving Vccmin of dense 6T SRAM cell 2008 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS, 2008, : 185 - 188
- [2] Design and Analysis of 6T SRAM Cell with NBL Write Assist Technique Using FinFET 2017 INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATIONS AND ELECTRONICS (COMPTELIX), 2017, : 639 - 644
- [4] ANALYSIS OF NBTI EFFECTS ON READ AND WRITE OPERATIONS OF 6T SRAM CELLS JOURNAL OF ENGINEERING SCIENCE AND TECHNOLOGY, 2022, 17 (06): : 4308 - 4319
- [6] Design of 10T SRAM cell with improved read performance and expanded write margin IET Circuits, Devices and Systems, 2021, 15 (01): : 42 - 64
- [8] Static Noise Margin Analysis of 6T SRAM Cell ARTIFICIAL INTELLIGENCE AND EVOLUTIONARY COMPUTATIONS IN ENGINEERING SYSTEMS, ICAIECES 2015, 2016, 394 : 249 - 258
- [9] Evaluation of Read-and Write-Assist Circuits for GeOI FinFET 6T SRAM Cells 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2014, : 1122 - 1125
- [10] Analytical modeling of read noise margin of a CNFET based 6T SRAM cell Analog Integrated Circuits and Signal Processing, 2015, 83 : 369 - 376