A dynamic distribution of the input buffer for on-chip routers

被引:0
|
作者
Fan Lifang [1 ]
Zhang Xingming [1 ]
Chen Ting [1 ]
机构
[1] PLA Informat Engn Univ, Insitute Informat Engn, Zhengzhou 450002, Peoples R China
关键词
NoC; buffer; dynamic allocation; performance;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Each port has a same buffer in typical network on chip input ports. Under the condition of the imbalance load in the work, there will be a port all buffer used and some other ports has many idle buffer. It will reduce the NoC buffer utilization, then influence the NoC overall performance. In this paper, an algorithm of dynamically allocation port buffer based on load is proposed. This algorithm allocates buffer to each port according to the load of each port. It is improve the buffer utilization effectively. Under the 90nm process, we achieve the on chip router that can allocate input buffer dynamically. The experimental results show that the router's information delay reduced up to 34.7% and throughput increased by 13.4% in the hot mode. The router's area is smaller than the typical router overhead, so it can meet the application for the network on chip.
引用
收藏
页码:287 / 292
页数:6
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