40nm Embedded Self-Aligned Split-Gate Flash Technology for High-Density Automotive Microcontrollers

This paper successfully demonstrates a logic-compatible, high performance and high reliability, automotivegrade 2.5V embedded NVM process extending over several generations. A high-density flash macro is used to debug process complexities which arise from the add-on modules. The modular approach is adopted for integrating self-aligned, floating-gate-based split-gate SuperFlash r ESF3 cell into 40nm CMOS logic process. Key features of the product-like Macro are dual power supply with input voltage fluctuations, wide operating temperature range from -40 degrees C to 150 degrees C, fast byte/ word program under 10 mu s and sector/chip erase under 10ms. The macro random read access time is only 8ns under worst case conditions. Key process monitors are characterization and yield of the Macro. Endurance was extended to 200k cycles and satisfy automotive grade requirement with wide read margin. Post-cycling data retention performs very well up to 150 degrees C. Wafer sort yield is in high double digits, with consistent wafer-to-wafer and within-wafer uniformity, showing good process control. The technology is suitable for high-speed automotive MCU, as well as IoT, smart card, and industrial MCU applications.