A 450 MS/s 10-bit Time-Interleaved Zero-Crossing Based ADC

被引：0

作者：

Chu, J. ^{[1
]}

Lee, H. -S. ^{[1
]}

机构：

[1] MIT, Cambridge, MA 02139 USA

来源：

2011 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC) | 2011年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 450-MS/s 10-bit time-interleaved zero-crossing based pipelined ADC is described. The prototype ADC, fabricated in a 90-nm CMOS process, occupies 1.3 mm(2). A reference pre-charging technique is applied to reduce the voltage ripples on the reference voltages. Gain, offset, and timing calibration is applied to achieve an 8.7 ENOB with a 211 MHz input signal and dissipates 34 mW from a 1.2V supply for a FOM of 182 fJ/step.

引用

页数：4

共 50 条

[31] A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration
张逸文
陈迟晓
余北
叶凡
任俊彦
半导体学报, 2012, 33 (10) : 116 - 121
[32] A CMOS 15-bit 125-MS/s time-interleaved ADC with digital background calibration
Lee, Zwei-Mei
Wang, Cheng-Yeh
Wu, Jieh-Tsorng
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (10) : 2149 - 2160
[33] A 10-bit 100MS/s Time Domain Flash-SAR ADC
Wu, S. Y.
Du, L.
Jiang, M.
Ning, N.
Yu, Q.
Liu, Y.
2014 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2014,
[34] A 12b, 50 MS/s, Fully Differential Zero-Crossing Based Pipelined ADC
Brooks, Lane
Lee, Hae-Seung
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (12) : 3329 - 3343
[35] A zero-crossing-based 8-bit 200 MS/s pipelined ADC
Brooks, Lane
Lee, Hae-Seung.
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (12) : 2677 - 2687
[36] Systematic Design of 10-bit 50MS/s Pipelined ADC
Zhu, Kehan
Balagopal, Sakkarapani
Saxena, Vishal
2013 IEEE WORKSHOP ON MICROELECTRONICS AND ELECTRON DEVICES (WMED), 2013, : 17 - 20
[37] A 12-bit 600-MS/s Time-Interleaved SAR ADC with Background Timing Skew Calibration
Wei, Yen-Hsin
Lin, Chin-Yu
Lee, Tai-Cheng
2016 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT), 2016,
[38] A CMOS 15-bit 125-MS/s time-interleaved ADC with digital background. calibration
Lee, Zwei-Mei
Wang, Cheng-Yeh
Wu, Jieh-Tsorng
PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2006, : 209 - 212
[39] A 56 GS/s 8 Bit Time-Interleaved ADC in 28 nm CMOS
Luan, Jian
Zheng, Xuqiang
Wu, Danyu
Zhang, Yuzhen
Wu, Linzhen
Zhou, Lei
Wu, Jin
Liu, Xinyu
ELECTRONICS, 2022, 11 (05)
[40] 100 MS/s, 10-BIT ADC USING PIPELINED SUCCESSIVE APPROXIMATION
Sarafi, Sahar
Hadidi, Kheyrollah
Abbaspour, Ebrahim
Bin Aain, Abu Khari
Abbaszadeh, Javad
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2014, 23 (05)

← 1 2 3 4 5 →