Memory efficient pass-parallel architecture for JPEG2000 encoding

被引：2

作者：

Dyer, M ^{[1
]}

Taubman, D ^{[1
]}

Nooshabadi, S ^{[1
]}

机构：

[1] Univ New S Wales, Sch Elect Engn, Sydney, NSW, Australia

来源：

SEVENTH INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND ITS APPLICATIONS, VOL 1, PROCEEDINGS | 2003年

关键词：

D O I：

10.1109/ISSPA.2003.1224638

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

The CAUSAL, RESTART and RESET mode switches, previously used to enable microscopic parallelism and improve throughput, are examined in terms of the memory requirements of the JPEG2000 block coder. An Extended Pass Switching Arithmetic Encoder (EPSAE) is introduced that aids in the reduction of memory by providing the ability to partially process code-blocks. We show how the use of these switches and the EPSAE can reduce the overall amount of memory required by the block coder by a factor of 7. This reduction is achieved without the necessity of tight synchronization between the DWT and block coder.

引用

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页码：53 / 56

页数：4

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