The hardware structure design of perceptron with FPGA implementation

被引:0
|
作者
Wang, QR [1 ]
Yi, B [1 ]
Xie, Y [1 ]
Liu, BR [1 ]
机构
[1] Guangdong Univ Technol, Fac Automat, Guangzhou 510080, Peoples R China
关键词
neural networks; perceptron; FPGA; VHDL; Top-Down;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Most commonly, neural networks's models or algorithms are simulated and implemented by computer programming in neural networks theory research. But in many practical applications, it is necessary to consider essential issues such as hardware implementation. Specific application of neural networks hardware has the advantages of high speed, small in size, good performance and low cost. Thus, the implementation of high performance neural networks hardware is the final target in some actual applications. In this paper, a hardware structure of single perceptron that serves as the basic nerve cell and its implementation method with FPGA is introduced. It is based on VLSI implementation approach for the standard neural networks. The method proposed is a primary discussion and research for the hardware implementation of artificial neural networks.
引用
下载
收藏
页码:762 / 767
页数:6
相关论文
共 50 条
  • [11] Hardware implementation of the QC-LDPC decoder in the FPGA structure
    Kuc, Mateusz
    Sulek, Wojciech
    Kania, Dariusz
    PRZEGLAD ELEKTROTECHNICZNY, 2020, 96 (09): : 16 - 20
  • [12] Hardware structure analysis of fuzzy CMAC and its FPGA implementation
    Shen, Xianming
    Bai, Ruilin
    Wang, Lifeng
    DYNAMICS OF CONTINUOUS DISCRETE AND IMPULSIVE SYSTEMS-SERIES B-APPLICATIONS & ALGORITHMS, 2006, 13 : 357 - 360
  • [13] FPGA implementation of hardware voter
    Krstic, MD
    Stojcev, MK
    TELSIKS 2001, VOL 1 & 2, PROCEEDINGS, 2001, : 401 - 404
  • [14] Design and Implementation of Hardware Structure for Online Learning of Spiking Neural Networks Based on FPGA Parallel Acceleration
    Liu Y.
    Cao Y.
    Ye W.
    Lin Z.
    Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), 2023, 51 (05): : 104 - 113
  • [15] Design of linear algebra hardware accelerators dedicated to implementation in FPGA devices
    Ratuszniak, Piotr
    PRZEGLAD ELEKTROTECHNICZNY, 2011, 87 (10): : 155 - 158
  • [16] Hardware, design and implementation issues on a FPGA-based smart camera
    Dias, Fabio
    Berry, Francois
    Serot, Jocelyn
    Marmoiton, Francois
    2007 FIRST ACM/IEEE INTERNATIONAL CONFERENCE ON DISTRIBUTED SMART CAMERAS, 2007, : 17 - 23
  • [17] Hardware Based Design and Implementation of a Bottle Recycling Machine using FPGA
    Karin, Maofic Farhan
    Noor, Khandaker Sharif
    Zaman, Hasan U.
    2016 IEEE CONFERENCE ON SYSTEMS, PROCESS AND CONTROL (ICSPC), 2016, : 43 - 46
  • [18] Direct implementation of a perceptron in superconducting circuit quantum hardware
    Pechal, Marek
    Roy, Federico
    Wilkinson, Samuel A.
    Salis, Gian
    Werninghaus, Max
    Hartmann, Michael J.
    Filipp, Stefan
    PHYSICAL REVIEW RESEARCH, 2022, 4 (03):
  • [19] FPGA implementation of multilayer perceptron for modeling of photovoltaic panel
    Mekki, R.
    Mellit, A.
    Salhi, H.
    Belhout, K.
    INTELLIGENT SYSTEMS AND AUTOMATION, 2008, 1019 : 211 - +
  • [20] Hardware implementation of Moore test on FPGA
    Hisakado, T
    Nishimura, T
    Okumura, K
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, PROCEEDINGS, 2002, : 653 - 656