A new memory effect (MSD) in fully depleted SOI MOSFETs

被引：38
|
作者：
Bawedin, M
Cristoloveanu, S
Yun, JG
Flandre, D
机构：
[1] Univ Catholique Louvain, Microelect Lab, B-1348 Louvain, Belgium
[2] ENSERG, UMR CNRS, INPJ, UJF,IMEP, F-38016 Grenoble, France
来源：
SOLID-STATE ELECTRONICS | 2005年 / 49卷 / 09期
关键词：
floating body effect; memory effect; hysteresis; fully depleted; silicon-on-insulator (SOI); MOSFET;
D O I：
10.1016/j.sse.2005.07.019
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We demonstrate that the transconductance and drain current of fully depleted MOSFETs can display an interesting time-dependent hysteresis. This new memory effect, called meta-stable dip (MSD), is mainly due to the long carrier generation lifetime in the silicon film. Our parametric analysis shows that the memory window can be adjusted in view of practical applications. Various measurement conditions and devices with different doping, front oxide and silicon film thicknesses are systematically explored. The MSD effect can be generalized to several fully depleted CMOS technologies. The MSD mechanism is discussed and validated by two-dimensional simulations results. (c) 2005 Elsevier Ltd. All rights reserved.
引用
收藏
页码：1547 / 1555
页数：9
相关论文
共 50 条
  • [21] Performance enhancement of partially and fully depleted strained-SOI MOSFETs
    Numata, T
    Irisawa, T
    Tezuka, T
    Koga, J
    Hirashita, N
    Usuda, K
    Toyoda, E
    Miyamura, Y
    Tanabe, A
    Sugiyama, N
    Takagi, S
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (05) : 1030 - 1038
  • [22] Anomalous radiation effects in fully depleted SOI MOSFETs fabricated on SIMOX
    Li, Y
    Niu, GF
    Cressler, JD
    Patel, J
    Marshall, CJ
    Marshall, PW
    Kim, HS
    Reed, RA
    Palmer, MJ
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2001, 48 (06) : 2146 - 2151
  • [23] INTERFACE CHARACTERIZATION OF FULLY DEPLETED SOI MOSFETS BY THE DYNAMIC TRANSCONDUCTANCE TECHNIQUE
    IOANNOU, DE
    ZHONG, XD
    MAZHARI, B
    CAMPISI, GJ
    HUGHES, HL
    IEEE ELECTRON DEVICE LETTERS, 1991, 12 (08) : 430 - 432
  • [24] Scaling behavior of sub-micron MOSFETs on fully depleted SOI
    Kistler, N
    Woo, J
    SOLID-STATE ELECTRONICS, 1996, 39 (04) : 445 - 454
  • [25] Discrete dopant effects in ultrasmall fully depleted ballistic SOI MOSFETs
    Gilbert, MJ
    Ferry, DK
    SUPERLATTICES AND MICROSTRUCTURES, 2003, 34 (3-6) : 277 - 282
  • [26] On the Stability of Fully Depleted SOI MOSFETs Under Lithography Process Variations
    Kampen, Christian
    Fuehner, Tim
    Burenkov, Alexander
    Erdmann, Andreas
    Lorenz, Juergen
    Ryssel, Heiner
    ESSDERC 2008: PROCEEDINGS OF THE 38TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2008, : 194 - 197
  • [27] TRANSIENT-BEHAVIOR OF SUBTHRESHOLD CHARACTERISTICS OF FULLY DEPLETED SOI MOSFETS
    ASSADERAGHI, F
    CHEN, J
    SOLOMON, R
    CHAN, TY
    KO, PK
    HU, CM
    IEEE ELECTRON DEVICE LETTERS, 1991, 12 (10) : 518 - 520
  • [28] New analytical model for subthreshold current in short-channel fully-depleted SOI MOSFETs
    Pidin, S
    Koyanagi, M
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (3B): : 1264 - 1270
  • [29] PARASITIC BIPOLAR GAIN IN FULLY DEPLETED N-CHANNEL SOI MOSFETS
    VERPLOEG, EP
    NGUYEN, CT
    WONG, SS
    PLUMMER, JD
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (06) : 970 - 977
  • [30] Temperature dependence of off-current in bulk and fully depleted SOI MOSFETs
    Miyaji, K
    Saitoh, MI
    Nagumo, T
    Hiramoto, T
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2005, 44 (4B): : 2371 - 2375
12345