共 50 条
- [31] BINARY-COMPATIBLE SIGNED-DIGIT ARITHMETIC [J]. COMMUNICATIONS OF THE ACM, 1964, 7 (10) : 569 - 569
- [32] Efficient squaring circuit using canonical signed-digit number representation [J]. IEICE ELECTRONICS EXPRESS, 2014, 11 (02):
- [33] New Residue Signed-Digit Addition Algorithm [J]. PROCEEDINGS OF THE FUTURE TECHNOLOGIES CONFERENCE (FTC) 2019, VOL 2, 2020, 1070 : 390 - 396
- [34] Residue signed-digit arithmetic circuit with a complement of modulus and the application to RSA encryption processor [J]. ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS, 2002, : 591 - 594
- [35] Residue Signed-Digit Arithmetic and the Conversions between Residue and Binary Numbers for a Four-Moduli Set [J]. 2012 11TH INTERNATIONAL SYMPOSIUM ON DISTRIBUTED COMPUTING AND APPLICATIONS TO BUSINESS, ENGINEERING & SCIENCE (DCABES), 2012, : 436 - 440
- [36] Quaternary signed-digit arithmetic operations for optical computing [J]. PHOTONIC DEVICES AND ALGORITHMS FOR COMPUTING, 1999, 3805 : 258 - 263
- [37] Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits [J]. MEMSYS 2016: PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON MEMORY SYSTEMS, 2016, : 442 - 454
- [38] Optoelectronic symbolic substitution based canonical modified signed-digit arithmetic [J]. OPTICS AND LASER TECHNOLOGY, 1997, 29 (03): : 151 - 157
- [40] Bidirectional conversion to minimum signed-digit representation [J]. 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 2413 - +