共 50 条
- [23] Fast modular multiplication using booth recoding based on signed-digit number arithmetic [J]. APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2002, : 31 - 36
- [24] Booth memoryless modular multiplier with signed-digit number representation [J]. PROCEEDINGS OF THE 2004 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1 AND 2: SOC DESIGN FOR UBIQUITOUS INFORMATION TECHNOLOGY, 2004, : 21 - 24
- [26] Recoding Algorithms for Minimal Signed-Digit Numbers in Residue Number System [J]. 2013 IEEE INTERNATIONAL CONFERENCE OF IEEE REGION 10 (TENCON), 2013,
- [27] A multiplicative inverse algorithm based on modulo (2p-1) signed-digit arithmetic for residue to weighted number conversion [J]. 2007 INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS, VOLS 1 AND 2, 2007, : 1 - 4
- [28] EFFICIENT TRINARY SIGNED-DIGIT SYMBOLIC ARITHMETIC [J]. OPTICS LETTERS, 1994, 19 (05) : 353 - 355