共 31 条
- [1] Number conversions between RNS and mixed-radix number system based on modulo (2P-1) signed-digit arithmetic [J]. SBCCI 2005: 18th Symposium on Integrated Circuits and Systems Design, Proceedings, 2005, : 160 - 165
- [2] A new RNS to mixed-radix number converter using modulo (2p-1) signed-digit arithmetic [J]. PROCEEDINGS OF THE 2004 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1 AND 2: SOC DESIGN FOR UBIQUITOUS INFORMATION TECHNOLOGY, 2004, : 377 - 380
- [3] Residue-Weighted Number Conversion with Moduli Set {2p-1, 2p+1, 22p+1, 2p} Using Signed-Digit Number Arithmetic [J]. PROCEEDINGS OF THE NINTH INTERNATIONAL SYMPOSIUM ON DISTRIBUTED COMPUTING AND APPLICATIONS TO BUSINESS, ENGINEERING AND SCIENCE (DCABES 2010), 2010, : 629 - 633
- [4] Fast residue arithmetic multipliers based on signed-digit number system [J]. ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS, 2001, : 263 - 266
- [6] Fast Signed-Digit Arithmetic Circuits for Residue Number Systems [J]. 2015 IEEE CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS), 2015, : 344 - 347
- [7] Residue arithmetic circuits using a signed-digit number representation [J]. ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL I: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 24 - 27
- [8] Residue arithmetic circuits based on signed-digit number representation and the VHDL implementation [J]. NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS, 1999, : 218 - 221
- [10] Reverse conversion architectures for Signed-Digit Residue Number systems [J]. 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 2701 - +