A multiplicative inverse algorithm based on modulo (2p-1) signed-digit arithmetic for residue to weighted number conversion

被引:0
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作者
Wei, Shugang [1 ]
机构
[1] Gunma Univ, Dept Comp Sci, Kiryu Gunma 3768515, Japan
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The multiplicative inverse numbers are needed for converting the numbers in a residue number system(RNS) into a weighted number. In this paper, a new hardware algorithm is presented by use of a radix-two signed-digit (SD) arithmetic for the multiplicative inverse calculation modulo m(i) = (2(pi) - 1), where mi is a modulus in the RNS. The calculation of an multiplicative inverse number can be implemented only by carry-free SD additions. An efficient serial residue-to-weighted number converter with the number inversion circuit is also proposed. By circuit design and simulation, the proposed converter using SD arithmetic has high speed performance compared to that based on binary arithmetic.
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页码:1 / 4
页数:4
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    [J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2000, E83D (12) : 2056 - 2064
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    [J]. 2015 IEEE CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS), 2015, : 344 - 347
  • [7] Residue arithmetic circuits using a signed-digit number representation
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    [J]. ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL I: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 24 - 27
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