Research of SBB Effect on SOI-MOSFET Low Power 4T SRAM Cell

被引：0

作者：

Ma, Zhuang ^{[1
]}

Yu, Sichen ^{[1
]}

Shao, Zhibiao ^{[1
]}

机构：

[1] Xi An Jiao Tong Univ, Dept Microelect, Xian 710049, Peoples R China

来源：

2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009) | 2009年

关键词：

4T SRAM; SOI; SBB; on/off-state current ratio; Cross-shaped gate; TECHNOLOGY;

D O I：

10.1109/EDSSC.2009.5394218

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A high drive current and low power 4T SOI-SRAM cell with 0.5V supply voltage is proposed. This structure adopts Cross-shaped gate n-MOSFET and ultra thin self-body-bias (SBB) resistor. They share the same gate electrode to form the inverter of SRAM cell. The Cross-shaped gate n-MOSFET increases the drive current. Furthermore, the process of SBB resistor is simple and compatible with SOI-CMOS process. The performance and process of the proposed memory cell are simulated by MEDICI and T-SUPREM4. Results show that the ultra thin SBB resistor has a 4.1 x 10(4) on/off-state current ratio and its on-state current closed to 10uA/um is comparable to the n-MOSFET. At 0.5V supply voltage, the memory cell's static noise margin (SNM) is about 296mV and the dynamic power dissipation of write and read operation are about 1.6uW and 1.2uW respectively.

引用

页码：453 / 456

页数：4

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