A MapReduce framework implementation for Network-on-Chip platforms

被引：0
|
作者：
Gyftakis, Konstantinos [1 ]
Anagnostopoulos, Iraklis [1 ]
Soudris, Dimitrios [1 ]
Reisis, Dionysios [2 ]
机构：
[1] Natl Tech Univ Athens, Sch Elect & Comp Engn, GR-10682 Athens, Greece
[2] Univ Athens, GR-10679 Athens, Greece
来源：
2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2014年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
All facets of society are generating increasing amounts of data confirming the term big data for modern applications. The next generation of embedded systems will be dominated by such smart applications offering a wide range of communication services. Driven also by hardware changes and the adoption of the many-core architectural template, a better resource management scheme is required. MapReduce is a programming model capable of processing large data sets with a parallel distributed algorithm using a large number of processing nodes. In this paper, we present a MapReduce framework for an embedded many-core Network-on-Chip platform with distributed shared memory characteristics. The proposed framework, which supports bare-metal systems, provides a scalable solution for data processing in a many-core system, while fully utilizing the platform's characteristics and achieving application speedup.
引用
收藏
页码：120 / 123
页数：4
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