共 22 条
- [2] Synchronous full-scan for asynchronous handshake circuits [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2003, 19 (04): : 397 - 406
- [3] Synchronous Full-Scan for Asynchronous Handshake Circuits [J]. Journal of Electronic Testing, 2003, 19 : 397 - 406
- [4] Static test compaction for multiple full-scan circuits [J]. 21ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, PROCEEDINGS, 2003, : 393 - 396
- [5] ATPG for dynamic burn-in test in full-scan circuits [J]. PROCEEDINGS OF THE 15TH ASIAN TEST SYMPOSIUM, 2006, : 75 - +
- [6] An efficient test relaxation technique for combinational & full-scan sequential circuits [J]. 20TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2002, : 53 - 59
- [7] Static test compaction for diagnostic test sets of full-scan circuits [J]. IET COMPUTERS AND DIGITAL TECHNIQUES, 2010, 4 (05): : 365 - 373
- [8] Exact computation of maximally dominating faults and its application to n-detection tests for full-scan circuits [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2004, 151 (03): : 235 - 244
- [10] An almost full-scan BIST solution - Higher fault coverage and shorter test application time [J]. INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS, 1998, : 1065 - 1073