Analytical Model and Optimization for Variable Drift Region Width SOI LDMOS Device

被引：9
|
作者：
Wang, Ying [1 ]
Meng, Xiong-Fei [2 ]
Tang, Pan-Pan [2 ]
Cui, Su-Fen [2 ]
机构：
[1] Hangzhou Dianzi Univ, Key Lab RF Circuits & Syst, Minist Educ, Hangzhou 310018, Zhejiang, Peoples R China
[2] Harbin Engn Univ, Coll Informat & Commun Engn, Harbin 310018, Peoples R China
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2016年 / 63卷 / 11期
基金：
中国国家自然科学基金;
关键词：
Analytical model; equivalent drift; silicon-on-insulator lateral double-diffused MOS (SOI LDMOS); TRANSISTORS;
D O I：
10.1109/TED.2016.2607423
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, we propose an analytical model for the variable drift region width (VDRW) silicon-on-insulator lateral double-diffused MOS (SOI LDMOS) device. Using the proposed model, for example, the breakdown voltage 375 V of VDRW SOI LDMOS is obtained with a 18-mu m drift region length, while the average value of the surface electric field can reach 20.8 V/mu m. A 3-D device simulator, Sentaurus, is used to investigate the performance of the VDRW structure. By analyzing the simulation results and the analytical values, it is proven that the proposed model can effectively optimize the doping profile and accurately forecast the breakdown voltage.
引用
收藏
页码：4352 / 4358
页数：7
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