A High-voltage Silicon-On-Insulator Lateral IGBT with Segmented Trenches for Improved Short circuit Ruggedness

被引：1

作者：

Sen Zhang ^{[1
,2
]}

Ma, Jie ^{[1
]}

Luo, Min ^{[1
]}

Wang, Xiaona ^{[1
]}

He, Nailong ^{[2
]}

Song, Hua ^{[2
]}

Li, Sheng ^{[1
]}

Wei, Jiaxing ^{[1
]}

Liu, Siyang ^{[1
]}

Zhang, Long ^{[1
]}

Sun, Weifeng ^{[1
]}

机构：

[1] Southeast Univ, Sch Elect Engn Sci, Natl ASIC Syst Engn Res Ctr, Nanjing, Peoples R China

[2] CSMC Technol Corp, Wuxi, Jiangsu, Peoples R China

来源：

2022 IEEE 34TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD) | 2022年

基金：

中国国家自然科学基金; 国家重点研发计划;

关键词：

Silicon-on-insulator; SW; lateral IGBT; LIGBT; SOI-LIGBT; segmented trench; potential modulation; low saturation current; I-sat; short-circuit; ruggedness; LIGBT;

D O I：

10.1109/ISPSD49238.2022.9813658

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A novel LIGBT with segmented trenches (STs) is proposed for improved short circuit ruggedness in this paper. STs are inserted in the drift region of the novel structure. STs can be formed simultaneously with isolation trenches by one-step etching and subsequently polysilicon refilling. The polysilicon in STs is connected to the emitter by metal interconnection. The electric potential modulation and hole blocking effect concepts are proposed in this work In the saturation area, the electronic potential at the end of N-type inversion channel can be lowered by grounded STs, resulting in weakened electron injection. In the liner area, the holes from collector are blocked by STs, and thus the conductivity modulation is enhanced. As a result, the novel structure obtains an ultra-low I-sat without increasing V-on and 406% increase in t(sc).

引用

页码：309 / 312

页数：4

共 50 条

[31] High-Performance Lateral Avalanche Photodiode Based on Silicon-on-Insulator Structure
Xu, Hang
Yang, Yafen
Tan, Jingjing
Chen, Lin
Zhu, Hao
Sun, Qingqing
IEEE ELECTRON DEVICE LETTERS, 2022, 43 (07) : 1077 - 1080
[32] A high-voltage lateral IGBT with significantly improved on-state characteristics on SOI for an advanced PDP scan driver IC
Sumida, H
Hirabayashi, A
Kobayashi, H
2002 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, 2002, : 64 - 65
[33] Improved KEMA arc model for high-voltage circuit breaker
Jia, Heng
Luo, Longfu
Xu, Jiazhu
Dianli Zidonghua Shebei/Electric Power Automation Equipment, 2012, 32 (09): : 134 - 137
[34] NOVEL HIGH VOLTAGE SILICON-ON-INSULATOR DEVICE WITH COMPOSITE DIELECTRIC BURIED LAYER
Fan, Jie
Luo, Xiaorong
Zhang, Bo
Li, Zhaoji
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2013, 22 (10)
[35] Compact very high voltage CMOS compatible bipolar silicon-on-insulator transistor
Litwin, Andrej, 1600, IEEE, Piscataway, NJ, United States
[36] Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator
Zhang, Bo
Li, Zhaoji
Hu, Shengdong
Luo, Xiaorong
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2009, 56 (10) : 2327 - 2334
[37] Digitally controlled high-voltage analog switch array for medical ultrasound applications in thin-layer silicon-on-insulator process
Dufort, B
Letavic, T
Mukherjee, S
2002 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, 2002, : 78 - 79
[38] A very narrow mesa biased IGBT for ultra-low on-state saturation voltage and a good short circuit ruggedness
Lu, Jiang
Tian, Xiaoli
Liu, Jiawei
Chen, Hong
Liang, Fei
Bai, Yun
2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2019,
[39] An Improved Large-Signal Equivalent Circuit Model for Partially Depleted Silicon-on-Insulator MOSFET
Wu, Yunqiu
Du, Xingzheng
Wang, Qiuping
Liu, Huihua
Yu, Yiming
Zhao, Chenxi
Kang, Kai
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2021, 69 (06) : 2972 - 2980
[40] The Contribution of the Main-Junction Lateral Resistive Zone to the Ruggedness of High-Voltage FRDs: A New Insight
Li, Peng
Wu, Yu
Wen, Jialiang
Cui, Lei
Liu, Chenjing
Guo, Yong
2017 INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2017,

← 1 2 3 4 5 →