Performance Improvement of Radix-4 Booth Multiplier on Negative Partial Products

被引：0

作者：

Li, Yang ^{[1
]}

Tang, Xiqin ^{[2
]}

Liu, Wanting ^{[1
]}

Qiao, Shushan ^{[2
]}

Zhou, Yumei ^{[2
]}

Shang, Delong ^{[2
]}

机构：

[1] Univ Chinese Acad Sci, Nanjing Inst Intelligent Technol IMECAS, Nanjing, Peoples R China

[2] Chinese Acad Sci, Nanjing Inst Intelligent Technol IMECAS, Inst Microelect, Nanjing, Peoples R China

来源：

2021 THE 6TH INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS AND MICROSYSTEMS (ICICM 2021) | 2021年

关键词：

booth multiplier; booth algorithm; negative partial product; positive partial product; low power;

D O I：

10.1109/ICICM54364.2021.9660365

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The traditional Booth decoding applied in Radix-4 Booth multiplier algorithm, introduces a lot of complement operations during processing negative partial products, which increases the design complexity and deteriorates the system performance. To handle this issue, combinations of the classification partial products are analyzed to eliminate the complement conversion in certain situations. Based on this algorithm, an improved 16X16 Radix-4 Booth multiplier with a novel two-stage decoding process is proposed. The design is implemented with Synopsys Design Compiler under SMIC CMOS 55nm technology. The synthesis results show that this work has improvement on reducing the power consumption, boosting the working speed, and narrowing the circuit size.

引用

页码：222 / 226

页数：5

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