Diagnostic test pattern generation for sequential circuits

被引：23

作者：

Hartanto, I

Boppana, V

Patel, JH

Fuchs, WK

机构：

来源：

15TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS | 1997年

关键词：

D O I：

10.1109/VTEST.1997.600264

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A method to perform diagnostic test generation in sequential circuits by modifying a conventional test generator is presented. The method utilizes circuit netlist modification along with a forced value at a primary input in the modified circuit. Techniques to reduce the computational effort for diagnostic test pattern generation in sequential circuits are also presented. Speed-up of the diagnostic ATPG process is achieved by the identification of states that are impossible to justify with three-valued logic.

引用

页码：196 / 202

页数：7

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