Automatic test pattern generation for sequential circuits using genetic algorithms

被引：0
|
作者：
Rajesh, V [1 ]
Jain, A [1 ]
机构：
[1] Indian Inst Technol, Dept Comp Engn & Sci, Kanpur, Uttar Pradesh, India
来源：
ELEVENTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS | 1997年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper discusses a new objective function to generate test patterns for sequential circuits;using genetic algorithms. This approach is based on the importance of assigning a value (0 or 1) to a line with respect to faults in consideration. This is simulation based and can be used for any circuit that can be simulated logically.
引用
收藏
页码：270 / 273
页数：4
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