共 50 条
- [1] A system-level simulation environment for system-on-chip design 13TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2000, : 58 - 62
- [2] System-level simulation environment for system-on-chip design Proc Annu IEEE Int ASIC Conf Exhib, (58-62):
- [3] System-level synthesis of application specific systems using A* search and generalized force-directed heuristics 9TH INTERNATIONAL SYMPOSIUM ON SYSTEMS SYNTHESIS, PROCEEDINGS, 1996, : 2 - 7
- [4] A system-level multiprocessor system-on-chip modeling framework 2004 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS, 2004, : 81 - 84
- [6] System-level co-design methodology based on platform design flow for system-on-chip 7TH INTERNATIONAL CONFERENCE ON COMPUTER-AIDED INDUSTRIAL DESIGN & CONCEPTUAL DESIGN, 2006, : 246 - 249
- [9] System-Level Behavior Construction and Design Risk Evaluation Based on United Model for System-on-Chip 2009 INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY AND COMPUTER SCIENCE, VOL 1, PROCEEDINGS, 2009, : 382 - +